Job Description
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
An experienced ASIC Digital Design Engineer with a strong background in developing test benches and verifying integrated IP subsystems for global customers. You bring a wealth of knowledge in Verilog, System Verilog, and Perl/Python scripting skills, with a proven track record in UVM verification environments. Your expertise in debugging and root cause analysis sets you apart, and you are adept at communicating complex technical issues and solutions effectively. With hands-on experience in DFI, DDR PHY, or Memory subsystems, you are ready to tackle challenging projects and drive them to successful completion.
You hold at least a BSEE in Electrical Engineering with over 7 years of industry experience, or an MSEE with over 5 years of experience. Your problem-solving skills are exemplary, and you thrive in a collaborative environment where innovation and technical excellence are valued.
What You’ll Be Doing:
- Developing comprehensive test benches for IP subsystems.
- Verifying integrated IP subsystems to ensure they meet customer specifications.
- Collaborating with global engineering teams to drive project success.
- Utilizing UVM verification environments to optimize verification processes.
- Debugging and resolving complex issues within IP subsystems.
- Documenting verification plans and results to maintain project transparency.
The Impact You Will Have:
- Ensuring the reliability and performance of IP subsystems for high-profile customers.
- Driving innovation in chip design and verification processes.
- Contributing to the development of cutting-edge technology solutions.
- Enhancing the efficiency and effectiveness of the engineering team.
- Supporting the delivery of high-quality products within project timelines.
- Strengthening Synopsys’ position as a leader in the semiconductor industry.
What You’ll Need:
- BSEE in Electrical Engineering with 7+ years of industry experience or MSEE with 5+ years.
- Proficiency in Verilog, System Verilog, and Perl/Python scripting.
- Strong experience with UVM verification environments.
- Excellent debugging skills and ability to root cause issues.
- Experience with DFI, DDR PHY, or Memory subsystems.
Who You Are:
- An effective communicator with excellent problem-solving skills.
- A collaborative team player who thrives in a dynamic environment.
- Detail-oriented and committed to delivering high-quality work.
- Passionate about continuous learning and technological innovation.
- Proactive and able to work independently with limited supervision.
The Team You’ll Be A Part Of:
Our team is focused on the design and verification of cutting-edge ASIC solutions. We work collaboratively with global engineering teams to deliver high-performance IP subsystems that meet the evolving needs of our customers. Our team is dedicated to innovation, technical excellence, and continuous improvement.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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